Capacity Building

The Microelectronics Development Programme supports R&D projects in the microelectronics area. Capacity building projects have been been initiated in this area with an aim to generate specialised manpower in the country in the field of microelectronics / VLSI/ related fields. Details of such initiatives are given below:

  • Identifying Analog Mixed Signal domain as one of the very important area in the field of microelectronics, DeitY initiated projects in this crucial area at institutions of repute across the country namely IIT Bombay, IIT Madras, IISc Bangalore, CEERI Pilani and NIT Tiruchirappalli. The core areas covered include, wireless communication systems, high speed signal processing as applied to data communication & data conversion, biomedical applications, instrumentation applications etc.
  • The National Policy on Electronics aims to “Build on the emerging chip design and embedded software industry to achieve global leadership in VLSI, Chip Design and other frontier areas and to achieve turnover of USD 55 billion by 2020". Keeping this in view, a project entitled “Special Manpower Development Programme for Chips to System Design” was initiated under the ‘Digital India Program’. The main objectives of the programme are- bringing in a culture of System designing by developing working prototypes with societal applications using mostly in-house designed ASICs / ICs, capacity building in the area of VLSI/ microelectronics and Chip to System development at BE/B. Tech, ME/M. Tech and PhD level, broaden the base of ASIC / IC designing in the country, broaden the R&D base of Microelectronics / Chip to System through ‘Networked PhD’ program, promote ‘Knowledge Exchange Program’ and promote protection of "Intellectual Property" generated in the program. The present program will be implemented at 60 institutions across the country including all IITs and NITs. The programme will result in generation of over 50,000 specialized manpower in VLSI Design and related area [Type–I (PhD), Type–II & Type–III (M. Tech) and Type–IV (B. Tech) level]. It is also proposed to develop 10 working prototype of System/SoC/Sub-System, Application Specific ICs and Field Programmable Gate Array based board level designs under the programme. The program will also result in generation of Intellectual Property Cores, publication of papers etc. Under the program Instruction Enhancement Programmes for faculty of participating institutions would be organised along with organizing ZOPP Workshop etc.
  • Under the project “Setting up of Facilities for Fabrication of Micro-electro-Mechanical Systems (MEMS) Devices”, being implemented at Tezpur University, facility have been setup for fabrication of MEMS devices. About 101 Research scholars/M. Tech and B. Tech students from the Tezpur University and 32 Research scholars/M. Tech and B. Tech students from other institutions of North East region have been trained using these facilities.