Wideband RF Amplifier
ASIC based Digital Programmable Hearing Aid
An ASIC based Digital Programmable Hearing Aid (DPHA) along with hearing aid programming software has been designed and developed and field trials have been carried out for Body Worn type and Behind-the-ear type at hospitals/institutes across India. Actions have been initiated for Transfer of technology to the industry.
Micro-Electrical Mechanical Systems (MEMS) based Gas sensor
A Micro-Electro- Mechanical Systems (MEMS) based Gas sensor prototype alongwith control circuitry for sensing LPG has been designed and developed.
General Purpose 8 port Secure Microcontroller
A general purpose 8 port secure microcontroller has been developed and fabricated with features like 4 KB RAM and 32 KB Flash EEPROM, bi-directional ports, SPI module, RS232 serial port et al and is available for Transfer of Technology. Actions have been initiated for Transfer of technology to the industry.
Smart Camera Algorithms for Object Tracking and Change Detection
Smart Camera Algorithms for Object Tracking and Change Detection have been developed and ported on the Field Programmable gate Arrays (FPGAs). Lab demonstration is completed and is available for transfer of technology. Actions are being initiated for Transfer of technology.
Synthetic Jet based Cooling
Synthetic Jet based Cooling technique for High Heat Flux Electronics Components has been developed at IIT Bombay and is available for transfer of technology.
Software package for 2-stage op-amp circuit
A software package OpAmp DESIGN for 2-stage op-amp circuit has been developed by IIT Kharagpur. OpAmpDESIGN is a computer aided design tool for different CMOS operational amplifier topologies such as miller-compensated two stage opamp. For a given specification, it finds "optimum" sizes of different MOS transistors and values of resistors and capacitors with which the circuit meets the specification requirement. Typically, the design time is within 100 seconds.
In this release the following two topologies have been incorporated:
(i) Miller-compensated Two-stage Opamp (input devices are NMOS)
(ii)Miller-compensated Two-stage Opamp (input devices are PMOS)
Low Temperature Co-fired Ceramic (LTCC) Facilities
A State-of-the-art facility for Advanced Processing Capabilities in LTCC is set up in the country jointly supported by NPMASS-DRDO and DeitY at C-MET Pune. Infrastructure has been created to handle the advanced applications in LTCC such as high density interconnects, microfluidics and micro-sensor packaging.
The following patents/copyright applications have been filed:
• Low Power Continuous - Time Delta-Sigma Converters
• Method and Apparatus for Low Power Continuous- Time Delta Sigma Modulation
• Low Noise Amplifier and Mixer
• Adaptive Digital Baseband Receiver
• Simultaneous Thermal Placement and Interconnect Optimization - Copyright
• Solving an interconnect crossing distribution problem in deep submicron circuit regime - Copyright
• Low Noise amplifying Mixer (International Patent)
• Adaptive Digital Base Band Receiver (International Patent)
• Low Power Continuous Delta Sigma Converters (International Patent)
• Low Distortion Filters (Indian patent)
• Synthetic Jet Actuator and a semiconductor module comprising this actuator
• Reconfigurable Computing System with Real-Time Operating System support
• Design and implementation of an Associative Architecture for object tracking in Smart Camera System.
• A Secure Programming Interface for Non Volatile Memory in an Embedded Device
• Programmable DSP SoC for low frequency applications incorporating power reduction through threshold based switching technique and macro management
• 8 Port Asynchronous Embedded Flash Program 8 Bit Microcontroller
• Active filters called Gm-assisted-OTA-RC (Patent Cooperation Treaty)
• Low Distortion Filters (Patent Cooperation Treaty)
• System and Method for Built-in Self Test (BIST) in an integrated circuit (PCT and Indian)
• A system to generate a predetermined fractional period time delay (US and Indian)
• An energy-efficient FLIPDAC switching technique for capacitive DAC in SAR ADCs (PCT and Indian)
• Low Drop Diode Equivalent Circuit (US and Indian)
In addition to above the following Patents in DeitY supported projects at CEERI, Pilani are being submitted:
1. A New Lift-off Technique to Define Fine Platinum Metal Features using CVD Sacrificial Layers.
2. Direct Read-out of Microheater Platform Temperature (in oC) for Gas Sensor Applications
3. On Chip Test Structure and Graphical Interpolation Method to Evaluate Sheet Resistance of Thin Conducting Films.